1. Field of the Invention
The present invention relates to a CRC encoding circuit for generating a CRC code from parallel data which are input as variable-length data having a remainder portion in the last parallel data set, and to a CRC encoding method therefor. Further, the present invention relates to a data sending device and a data receiving device for detecting an error of data in the data communication by using the CRC encoding circuit.
2. Description of Related Art
According to an earlier development, a CRC (Cyclic Redundancy Check) which has high ability to detect an error in a digital communication, is used. The CRC means an error detection method for detecting an error of data by making a comparison between the CRC code generated in a sender and the CRC code generated in a receiver.
Recently, for example, like POS (PPP Over SONET/SDH), the high-speed variable-length data communication which performs communication from end to end by framing a low-speed variable-length data frame (PPP frame) over a high-speed variable-length data frame (SONET/SDH frame), is utilized widely. A CRC encoding circuit which generates a CRC code in accordance with the inputted n-byte parallel data, has been introduced as means for detecting an error of data in such high-speed variable-length data communication.
Hereinafter, a former CRC encoder will be explained with reference to FIG. 3.
FIG. 3 shows circuit composition of a CRC encoding circuit 21. As shown in FIG. 3, a CRC encoding circuit 21 mainly comprises a 16-bytes parallel CRC encoder 22, each n-byte parallel CRC encoder 23 to 37 (n=1 to 15), and a selector (SEL) 38.
In the 16-bytes parallel data outputted from an external circuit, the parallel data other than the remainder portion data of the last parallel data set is encoded by the 16-bytes parallel CRC encoder 22. As a result, a CRC code is outputted as an encoded interim result. On the other hand, the remainder portion data of the last parallel data set is encoded by any one of the n-byte parallel CRC encoders corresponding to the number of the byte(s) of the inputted remainder portion data, in accordance with the encoded interim result, and then is outputted to the SEL 38. The SEL 38 selects the desired CRC code from the inputted plurality of CRC codes, and outputs the desired CRC code as a final encoded result.
Although the above-mentioned CRC encoding circuits 21 was useful as a remedy for processing less than 16 bytes of data, there was the following problem. For example, variable-length data is 16-bytes data, a total of 16 n-byte parallel CRC encoders including the CRC encoder(s) which is not actually used, are required. Thus, a total of 4n-1 byte(s) parallel CRC encoders are required as the number of bytes of the inputted 4n-byte parallel data increases. Therefore, the manufacturing costs of the CRC encoding circuit increases with the circuit scale of the CRC encoding circuit.